In 1991 and 1992, AMD and Intel outdid each other with ever higher clocked 486 and 386 processors. But in March 1993, Intel introduced a new microarchitecture with the Pentium – P5 for short. It was Intel’s first superscalar processor that could split instructions into pairs and execute them in two pipelines with their own ALUs. However, everything went “in order”: once one pipeline had finished executing, it might have to wait until the other was finished before continuing. But the Pentium also had a Branch Prediction Unit, for which Intel promised a performance gain of up to 25 percent.
Like all Intel processors since then, the processor had separate L1 caches for instructions and data as well as machine-specific registers (MSR). These have also survived to this day and perform countless functions. It communicated externally via a 64-bit data bus.
However, the first versions with 60 or 66 MHz were easily outperformed by the higher clocked and much cheaper 486DX4 chips in many benchmarks. That wasn’t true for floating-point arithmetic, however, because the Pentium’s new multiplication and division units eclipsed all that was conventional. However, the first versions also contained the notorious FDIV bug – but that’s another story.
Server ready
Die-shot (micrograph) of the 1992 Intel Pentium showing 3.1 million transistors from 0.8 micron fabrication
(Image: Intel)
The importance of another innovation only became apparent later: Thanks to the MESI protocol, the Pentium could work cache-coherently with other processors. Then there was the Multiprocessor Interconnect Bus (MPI bus). This made it easier to connect the Pentium to multiprocessor systems.
Intel also provided the 430LX (Mercury) chipset for the Pentium, which was designed for the Peripheral Component Interconnect Local Bus, or PCI bus for short, which was still young at the time. At that time, a decent mainboard chipset really consisted of several individual chips, in this case the PCI Cache and Memory Controller (PCMC) 82434LX, a Local Bus Accelerator 82433LX and, if necessary, a system I/O module.
With the Pentium, Intel laid the foundation for conquering the server market. However, x86 servers only really took off in 1995 with the Pentium Pro, which also brought out-of-order execution. Initially ridiculed, x86 technology has dominated the server market for years. At times, Intel’s Xeons had well over 90 percent of the market.
MMX and SIMD
Intel Pentium Pro
In 1993 came the Pentium P54C with up to 120 MHz and finally the P55C with 233 MHz and an L1 cache doubled to 32 KB – plus a very important innovation, the first SIMD vector unit (single instruction, multiple data) called MMX. This Multi Media Extension performed two 32-bit integer operations (either 4×16 bits or 8×8 bits) in parallel, using the lower 64 bits of the x87 registers.
But soon there was competition for the Pentium socket 5/7. In the spring of 1996, AMD brought out the 5k86, which was later called the K5. The AMD K6, which went back to the NexGen Nx686, had more success from 1997 onwards. It contained a RISC core with out-of-order execution and speculative execution. The K6-II then brought with 3DNow! a SIMD unit that, unlike Intel’s MMX, could also process floating-point numbers.
Podcast Bit Noise: RISC vs. CISC:
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